xen/arm: observe itargets setting in vgic_enable_irqs and vgic_disable_irqs
authorStefano Stabellini <stefano.stabellini@eu.citrix.com>
Wed, 13 Aug 2014 16:29:35 +0000 (17:29 +0100)
committerIan Campbell <ian.campbell@citrix.com>
Wed, 3 Sep 2014 14:23:25 +0000 (15:23 +0100)
commit5b3a817ea33b891caf7d7d788da9ce6deffa82a1
tree13431ac348d59673a11e4cc27cdcfb82af72e5a3
parente5d02979c81962c69dc9ffeb58546d977f8f9443
xen/arm: observe itargets setting in vgic_enable_irqs and vgic_disable_irqs

vgic_enable_irqs should enable irq delivery to the vcpu specified by
GICD_ITARGETSR, rather than the vcpu that wrote to GICD_ISENABLER.
Similarly vgic_disable_irqs should use the target vcpu specified by
itarget to disable irqs.

itargets can be set to a mask but vgic_get_target_vcpu always returns
the lower vcpu in the mask.

Correctly initialize itargets for SPIs.

Ignore bits in GICD_ITARGETSR corresponding to invalid vcpus.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
xen/arch/arm/vgic-v2.c
xen/arch/arm/vgic.c
xen/include/asm-arm/vgic.h